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Journal Articles

Failure Analysis of Halogen-Free Printed Circuit Board Assembly Under Board-Level Drop Test

Hung-Jen Chang, Chau-Jie Zhan, Tao-Chih Chang, Jung-Hua Chou
Journal: Journal of Electronic Packaging
Article Type: Research Papers
J. Electron. Packag. March 2012, 134(1): 011011.
DOI: https://doi.org/10.1115/1.4005956
Published Online: March 19, 2012
... of EcoDesign , pp. 1026 – 1031 . 5 Subassembly Mechanical Shock, 2004 , JESD22-B110A. 6 Board Level Drop Test Method of Components for Handheld Electronic Products, 2003 , JESD22-B111. 7 Pan , K. L. , Zhou , B. , and Yan , Y. L. , 2007 , “ Drop Dynamic Responses and Modal...
View Article titled, Failure Analysis of Halogen-Free Printed Circuit Board Assembly Under <span class="search-highlight">Board</span>-<span class="search-highlight">Level</span> <span class="search-highlight">Drop</span> <span class="search-highlight">Test</span>
Click here to open pdf in another window PDF for Failure Analysis of Halogen-Free Printed Circuit Board Assembly Under <span class="search-highlight">Board</span>-<span class="search-highlight">Level</span> <span class="search-highlight">Drop</span> <span class="search-highlight">Test</span>
Topics: Failure, Failure analysis, Fracture (Materials), Intermetallic compounds, Lead-free solders, Printed circuit board assemblies, Solder joints, Solders, Stress, Tin
Journal Articles

Investigations of Board-Level Drop Reliability of Wafer-Level Chip-Scale Packages

Yi-Shao Lai, Chang-Lin Yeh, Ching-Chun Wang
Journal: Journal of Electronic Packaging
Article Type: Technical Briefs
J. Electron. Packag. March 2007, 129(1): 105–108.
DOI: https://doi.org/10.1115/1.2429717
Published Online: June 6, 2006
... – 117 . JEDEC Solid State Technology Association, 2001 , JESD22-B110: Subassembly Mechanical Shock. JEDEC Solid State Technology Association, 2003 , JESD22-B111: Board Level Drop Test Method of Component for Handheld Electronics Products. Yeh , C.-L. , and Lai , Y.-S. , 2006...
View Article titled, Investigations of Board-Level Drop Reliability of Wafer-Level Chip-Scale Packages
Click here to open pdf in another window PDF for Investigations of Board-Level Drop Reliability of Wafer-Level Chip-Scale Packages
Topics: Reliability, Semiconductor wafers, Solder joints, Transient analysis